Portable personal electronic devices such as cellular telephones, notebook computers, and other peripheral equipment have become increasingly popular for consumers. The current technological challenge in building portable battery-operated equipment is to drastically reduce the power consumption and thus prolong battery life, and still maintain reasonable speed performance. The low standby power demands of CMOS makes it especially suited for this application. Although reducing the power supply voltage, V.sub.DD, to 1 V or below is very effective in reducing power consumption, it also lowers the speed performance. To lower the supply voltage and still maintain operational speed, the threshold voltage of the transistor, V.sub.T, must also be lowered. The threshold voltage can be reduced by using a lower substrate impurity concentration. However, this increases the undesirable short channel effect in submicron devices. Therefore, it may be seen that the design of a submicron transistor for low power supply voltage operations is non-trivial.